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this is information on a product in full production. february 2015 docid027322 rev 3 1/36 STWBC digital controller for wireless batte ry charger (wbc) transmitters qi 1.1.2 a11 certified, pma compatible datasheet - production data features ? digital controller for wir eless battery charger transmitter ? multiple qi certif ied and pma standard compatible ? support for up to 5 w applications ? mobile ? wearable, sports gear, medical ? remote controllers ? native support to half-bridge and full bridge topologies ? 5 v supply voltage ? 2 firmware options ? turnkey solution for quick design ? apis available for application customization (a) ? peripherals available via apis (a) ? adc with 10 bit precision and 1 m ? input impedance ?uart ?i 2 c master fast/slow speed rate ?gpios ? memory ? flash and e 2 prom with read-while-write (rww) and error correction code (ecc) ? program memory: 32 kbytes flash; data retention 15 years at 85 c after 10 kcycles at 25 c ? data memory: 1 kbyte true data e 2 prom; data retention:15 years at 85 c after 100 kcycles at 85 c ? ram: 6 kbytes ? reference design features ? 2 layers pcbs ? active object detection ? graphical user interface for application monitoring ? evaluation boards ? operating temperature: -40 c up to 105 c ? package: vfqfpn32 applications ? certified qi a11 ? evaluation board : steval-isb027v1 ? power rate: 5w ? input: 5v ? qi a13 (a) ? power rate: 5 w ? input: 5 - 16 v, 12 v ? wearable (a) ? power rate: 2 w ? input: 5 v ? pma (a) ? power rate: 5 w ? input: 5 v a. contact local sale representative for further details: see www.st.com. vfqfpn32 www.st.com
contents STWBC 2/36 docid027322 rev 3 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 introduction to wireless ba ttery charging systems . . . . . . . . . . . . . . . . 8 3 certified qi a11 solution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 firmware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 pinout and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 pinout for STWBC in qi a11 configuration . . . . . . . . . . . . . . . . . . . . . . . . 10 4.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 5 electrical characteristi cs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1 parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1.1 minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1.2 typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1.3 typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1.4 typical current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1.5 loading capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1.6 pin output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.3 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.3.1 vout external capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.3.2 internal clock sources and timing characte ristics . . . . . . . . . . . . . . . . . 18 5.3.3 memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.3.4 i/o port pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.3.5 typical output level curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.3.6 fast pad . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.3.7 reset pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3.8 i 2 c interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3.9 10-bit sar adc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.4 emc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.4.1 electrostatic discharge (esd) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.4.2 static latch-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
docid027322 rev 3 3/36 STWBC contents 36 6 thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 7 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 7.1 package design overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 7.2 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 8 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
list of tables STWBC 4/36 docid027322 rev 3 list of tables table 1. pinout description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 2. voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 3. current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 4. thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 5. general operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 6. operating conditions at power-up/power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 7. hsi rc oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 table 8. lsi rc oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 9. pll internal source clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 10. flash program memory/data e 2 prom memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 table 11. voltage dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 12. current dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 table 13. nrst pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 14. i 2 c interface characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 15. adc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 16. adc accuracy characteristics at v dd /v dda 3.3 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 17. adc accuracy characteristics at v dd /v dda 5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table 18. esd absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 19. electrical sensitivity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 20. package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table 21. vfqfpn32 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table 22. silicon product order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 table 23. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
docid027322 rev 3 5/36 STWBC list of figures 36 list of figures figure 1. STWBC device architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 2. system view of a wireless chargi ng system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 3. STWBC pinout view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 4. supply current measurement condit ions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 5. pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 6. pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 7. external capacitor c vout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 8. v oh standard pad at 3.3 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 9. v ol standard pad at 3.3 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 10. v oh standard pad at 5 v. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 11. v ol standard pad at 5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 12. v oh fast pad at 3.3 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 13. v ol fast pad at 3.3 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 14. v oh fast pad at 5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 figure 15. v ol fast pad at 5 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 figure 16. adc conversion accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 17. vfqfpn32 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
description STWBC 6/36 docid027322 rev 3 1 description the STWBC is the digital controller for wirele ss battery charger (wbc ) transmitters (tx) from stmicroelectronics, offering the most flexible and efficient solution for controlling power transfer to a receiver (rx) in wbc-enabl ed applications such as phones, wearables, and other battery powered devices that use electromagnetic induction for recharging. as a member of the qi wireless power cons ortium and the pma (pow er matters alliance), st ensures full compatibility with these leading wireless charging protocols and holds certification for the qi 1.1.2 a11 standard. the STWBC performs all the functions for transmi tter control: thanks to the internal 96 mhz clock and supporting both half-bridge and full bridge topologies, it is able to precisely control the amount of transmitted power to match the r equirements of the receiv ing unit in terms of maximizing the efficiency of the power transfer. the STWBC comes with firmware options to offe r customers the ability to personalize their end product without the need of external microcontrollers: ? a turnkey qi 1.1.2 a11 certified solution, fully interoperab le with qi en abled mobile phones. ? api (application programming interface) access to customize the underlying firmware, for example modifying the behavior of the leds or gpios in response to the receiver behavior and supporting i2c and uart communication within a network. the STWBC qi 1.1.2 a11 certified solution is available in the stmicroelectronics steval- isb027v1 reference design, intended for all qi compatible receivers such as in qi enabled mobile phones. in the reference design the STWBC integrates th e foreign object detection (fod): the digital feedback between tx and rx units allows the detection of metal objects close to the receiver that could result in potential hazards, enabling the STWBC to stop power transmission when such objects are detected. the reference design is offered together with a complete eco system to support customers in building their applications, including the qi 1.1.2 a11 certified board (steval-isb027v1), api libraries and documentation to develo p software customiz ations, as well as a comprehensive graphical user interface to monitor real-time performance and diagnostics.
docid027322 rev 3 7/36 STWBC description 36 figure 1. STWBC device architecture digital bridge controller temperature protection signal & protocol demodulator STWBC digital controller vbus monitor overcurrent protection 5v or 3.3v v input fod active object detector 2x led adc gpios uart i2c customizable topology specific firmware (including qi certification)
introduction to wireless battery charging systems STWBC 8/36 docid027322 rev 3 2 introduction to wireless battery charging systems wireless battery charging systems replace the traditional power supply cable by means of electromagnetic induction betwe en a transmitting pad (tx) and a battery powered unit (rx), such as a mobile phone or a battery pack. the power transmitter unit is responsible fo r controlling the transmitti ng coil and generating the correct amount of power requested by the receiver unit. the receiver unit continuously feedbacks to the transmitter the correct power level requested by modulating the transmitter carrier by means of a controlled resistive of capacitive insertion. generating the correct amount of power guarantees the highest leve l of end-to-end efficiency due to reduced energy waste. also, it helps maintaining a lower operational temperature. the digital feedback is also used to detect foreign objects, i.e.: metal incorrectly exposed to the coils. by stopping the application as soon as a foreign object is detected the risk of damage is reduced. digital wireless battery transmitters can adapt the amount of energy transferred by the coil by modulating the frequency, duty cycles or coil input voltage. figure 2. system view of a wireless charging system thanks to the internal STWBC 96 mhz clock, support for half-bridge and full bridge topologies and protocol detection units, the STWBC can drive the power emitted by a transmitting coil. the STWBC firmware sits on the top of the hardware to monitor and control the correct wireless charging operations.
docid027322 rev 3 9/36 STWBC certified qi a11 solution 36 3 certified qi a11 solution the STWBC has been certified for qi a11, thanks to the steval-isb027v1 reference design. the certification is based on the qi standard version 1.1.2 and supports fod (?foreign object detection?). the steval-isb027v1 reference design provides a complete kit which includes the STWBC ic, firmware, layout, graphical interfaces and tools. the layout is based on a cost- effective 2-layer pcb. firmware the STWBC firmware is available in two separate software packages: ? turn-key: the firmware is di stributed as a binary file. ? api customizable: the firmware is designed as a library and external functions as well as peripherals can be added by means of apis. the software apis allow a great freedom of a pplication customization. the STWBC and the api library can be accessed by programming the internal controller via standard programming tools such as the iar? workbench ? studio. every STWBC wireless charging architecture is a reference design supported by firmware, evaluation boards, application notes and pcb layouts notes.
pinout and pin description STWBC 10/36 docid027322 rev 3 4 pinout and pin description the STWBC is a multifunction device that can support several wireless charging architectures. the pinout is therefore application specific. section 4.1 shows the pinout used by the STWBC when the qi a11 configuration is used. 4.1 pinout for STWBC in qi a11 configuration figure 3. STWBC pinout view
docid027322 rev 3 11/36 STWBC pinout and pin description 36 4.2 pin description table 1. pinout description pin no. pin name pin type api firmware description bin firmware description 1uart_rx (1) di uart rx link uart rx link 2pwm_aux/gpio_2 (1) do pwm output or gpo not used, must not be connected to any potential 3 i2c_sda/digin [4] (1) i2c_sda / digital input 4 inactive (internal pull-up) 4 i2c_scl/digin [5] (1) i2c_scl / digital input 5 inactive (internal pull-up) 5 driveout [3] do output driver for low-side branch right output driver for low-side branch right 6gpio_0 (1) do digital output for the green light indicator / general purpose i/o digital output for the green light indicator 7gpio_1 (1) do digital output for the red light indicator / general purpose i/o digital output for the red light indicator 8 cpp_int_3 ai symbol detector symbol detector 9 cpp_int_2 ai vmain monitor vmain monitor 10 cpp_ref ai external reference for cpp_int_3 (if not used, must be tied to gnd) external reference for cpp_int_3 (if not used, must be tied to gnd) 11 cpp_int_1 ai symbol detector symbol detector 12 cpp_int_0 ai symbol detector symbol detector 13 vdda ps analog power supply analog power supply 14 vssa ps analog ground analog ground 15 tank_voltage ai lc tank voltage probe lc tank voltage probe 16 vbridge inactive (to be tied to g nd) inactive (to be tied to gnd) 17 spare_adc (1) spare analog input (to be tied to gnd if not used) spare analog input (to be tied to gnd) 18 ntc_temp ai ntc temperature measur ement. ntc temperature measurement. 19 isense ai lc tank current measurem ent lc tank current measurement 20 vmain ai vmain monitor vmain monitor 21 driveout [0] do output driver for low-side branch left output driver for low-side branch left 22 digin [0] (1) digital input 0 inactive (internal pull-up) 23 digin [1] (1) digital input 1 inactive (internal pull-up) 24 driveout [1] do output driver for high-side branch left output driver for high-side branch left 25 driveout [2] do output driver for high-side branch right output driver for high-side branch right 26 digin [2] (1) digital input 2 inactive (internal pull-up) 27 swim dio debug interface debug interface
pinout and pin description STWBC 12/36 docid027322 rev 3 28 nrst di reset reset 29 vdd ps digital and i/o power supply digital and i/o power supply 30 vss ps digital and i/o ground digital and i/o ground 31 vout supply internal ldo output internal ldo output 32 uart_tx (1) do uart tx link uart tx link 1. api configurable. table 1. pinout description (continued) pin no. pin name pin type api firmware description bin firmware description
docid027322 rev 3 13/36 STWBC electrical characteristics 36 5 electrical characteristics 5.1 parameter conditions unless otherwise specified, all voltages are referred to v ss . v dda and v dd must be connected to the same voltage value. v ss and v ssa must be connected together with the shortest wire loop. 5.1.1 minimum and maximum values unless otherwise specified, the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply voltage and frequencies by tests in production on 100% of the devices with an ambient temperature at t a = 25 c and t a = t a max. (given by the selected temperature range). data based on characterization results, design simulation and/or technology characteristics are indicated in table 2 , table 3 and from table 5 on page 17 to table 17 on page 29 footnotes and are not tested in production. 5.1.2 typical values unless otherwise specified, typical data are based on t a = 25 c, v dd and v dda = 3.3 v. they are given only as design guidelines and are not tested. typical adc accuracy values are determined by characterization of a batch of samples from a standard diffusion lot over the full temperature range. 5.1.3 typical curves unless otherwise specified, all typical curves are given as design guidelines only and are not tested. 5.1.4 typical current consumption for typical current consumption measurements, v dd and v dda are connected together as shown in figure 4 .
electrical characteristics STWBC 14/36 docid027322 rev 3 figure 4. supply curren t measurement conditions 5.1.5 loading capacitors the loading conditions used for the pin parameter measurement are shown in figure 5 : figure 5. pin loading conditions
docid027322 rev 3 15/36 STWBC electrical characteristics 36 5.1.6 pin output voltage the input voltage measurement on a pin is described in figure 6 . figure 6. pin input voltage 5.2 absolute maximum ratings stresses above those listed as 'absolute maximum ratings' may cause permanent damage to the device. this is a stress rating only and functional operation of the device under these conditions is not implied. ex posure to maximum rating conditions for extended periods may affect the device reliability. table 2. voltage characteristics symbol ratings min. max. unit v ddx - v ssx supply voltage (1) 1. all power v ddx (v dd , v dda ) and ground v ssx (v ss , v ssa ) pins must always be connected to the external power supply. -0.3 6.5 v v in input voltage on any other pin (2) 2. i inj(pin) must never be exceeded. this is implicitly insured if v in maximum is respected. if v in maximum cannot be respected, the injection current must be limited externally to the i inj(pin) value. a positive injection is induced by v in > v dd while a negative injection is induced by v in < v ss . vss -0.3 vdd +0.3 v dd - v dda variation between different power pins 50 mv v ss - v ssa variation between all the different ground pins (3) 3. v ss and v ssa signals must be interconnected together with a short wire loop. 50 v esd electrostatic discharge voltage refer to absolute maximum ratings (electrical sensitivity) in section 5.4.1 on page 31 .
electrical characteristics STWBC 16/36 docid027322 rev 3 table 3. current characteristics symbol ratings max. (1) 1. data based on characterization results, not tested in production unit i vddx total current into vddx power lines (2) 2. all power v ddx (v dd , v dda ) and ground v ssx (v ss , v ssa ) pins must always be connected to the external power supply. 100 ma i vssx total current out of vssx power lines (2) 100 i io output current sunk by any i/os and control pin ref. to table 11 on page 21 output current source by any i/os and control pin i inj(pin) (3) , (4) 3. i inj(pin) must never be exceeded. this is implicitly insured if v in maximum is respected. if v in maximum cannot be respected, the injection current must be limited externally to the i inj(pin) value. a positive injection is induced by v in > v dd while a negative injection is induced by v in < v ss . 4. negative injection disturbs t he analog performance of the device. injected current on any pin 4 i inj(tot) (3) , (4) , (5) 5. when several inputs are submitted to a current injection, the maximum ? iinj(pin) is the absolute sum of the positive and negative injected currents (instant aneous values). these results are based on characterization with ? iinj(pin) maximum current injection on four i/o port pins of the device. sum of injected currents 20 table 4. thermal characteristics symbol ratings max. unit t stg storage temperature range -65 to 150 oc t j maximum junction temperature 150
docid027322 rev 3 17/36 STWBC electrical characteristics 36 5.3 operating conditions the device must be used in operating conditions that respect the parameters in table 5 . in addition, a full account must be taken for all physical capacitor characteristics and tolerances. table 5. general operating conditions symbol parameter conditions min. typ. max. unit v dd1 , v dda1 operating voltages 3 (1) 1. the external power supply can be within range from 3 v up to 5.5 v. 5.5 (1) v v dd , v dda nominal operating voltages 3.3 (1) 5 (1) v out core digital power supply 1.8 (2) 2. internal core power supply voltage. c vout : capacitance of external capacitor (3) 3. care should be taken when the capacitor is selected due to its tolerance, its dependency on temperature, dc bias and frequency. at 1 mhz 470 3300 nf esr of external capacitor (2) 0.05 0.2 ? esl of external capacitor (2) ? ja (4) 4. to calculate p dmax (t a ), use the formula p dmax = (t jmax - t a )/ ? ja . fr4 multilayer pcb vfqfpn32 26 c/w t a ambient temperature pd = 100 mw -40 105 c table 6. operating conditions at power-up/power-down symbol parameter conditions min. (1) 1. guaranteed by design, not tested in production. typ. max. (2) 2. power supply ramp must be monotone. unit t temp reset release delay v dd rising 3 ms v it + power-on reset threshold 2.65 2.8 2.98 v v it - brownout reset threshold 2.58 2.73 2.88
electrical characteristics STWBC 18/36 docid027322 rev 3 5.3.1 vout external capacitor the stabilization of the main regulator is ac hieved by connecting an external capacitor c vout (b) to the vout pin. the c vout is specified in section 5.3: operating conditions . care should be taken to limit the series inductance to less than 15 nh. figure 7. external capacitor c vout 5.3.2 internal clock source s and timing characteristics hsi rc oscillator the hsi rc oscillator parameters are specif ied under general oper ating conditions for v dd and t a . b. esr is the equivalent series resist ance and esl is the equivalent inductance. table 7. hsi rc oscillator symbol parameter conditions min. (1) 1. data based on characterization results, not tested in production. typ. max. (1) unit f hsi frequency 16 mhz acc hsi accuracy of hsi oscillator (factory calibrated) (1) , (2) 2. variation referred to f hsi nominal value. v dd = 3.3 v t a = 25 oc -1% +1% % v dd = 3.3 v -40 oc ? t a ? 105 oc -4% +4% v dd = 5 v -40 oc ? t a ? 105 oc -4% +4% t su(hsi) hsi oscillator wakeup time including calibration 1s
docid027322 rev 3 19/36 STWBC electrical characteristics 36 lsi rc oscillator the lsi rc oscillator parameters are specifi ed under general operating conditions for v dd and t a . pll internal source clock table 8. lsi rc oscillator symbol parameter conditions min. (1) 1. guaranteed by design, not tested in production. typ. max. (1) unit f lsi frequency 153.6 khz acc lsi accuracy of lsi oscillator 3.3 v ? v dd ? 5 v -40 oc ? t a ? 105 oc -10% 10% % t su(lsi) lsi oscillator wakeup time 7 s table 9. pll internal source clock symbol parameter conditions min typ. max. (1) 1. data based on characterization results, not tested in production. unit f in input frequency (2) 2. pll maximum input frequency 16 mhz. 3.3 v ? v dd ? 5 v -40 oc ? t a ? 105 oc 16 mhz f out output frequency 96 t lock pll lock time 200 s
electrical characteristics STWBC 20/36 docid027322 rev 3 5.3.3 memory characteristics flash program and memory/data e 2 prom memory general conditions: t a = -40 c to 105 c. table 10. flash prog ram memory/data e 2 prom memory symbol parameter conditions min. (1) typ. (1) max. (1) unit t prog standard programming time (including erase) for byte/word/block (1 byte/4 bytes/128 bytes) 66.6ms fast programming time for 1 block (128 bytes) 3 3.3 t erase erase time for 1 block (128 bytes) 3 3.3 ms n we erase/write cycles( (2) (program memory) t a = 25 c 10 k cycles erase/write cycles (2) (data memory) t a = 85 c 100 k t a = 105 c 35 k t ret data retention (program memory) after 10 k erase/write cycles at t a = 25 c t ret = 85 c 15 years data retention (program memory) after 10 k erase/write cycles at t a = 25 c t ret = 105 c 11 data retention (data memory) after 100 k erase/write cycles at t a = 85 c t ret = 85 c 15 data retention (data memory) after 35 k erase/write cycles at t a = 105 c t ret = 105 c 6 i ddprg supply current during program and erase cycles -40 oc ? t a ? 105 oc 2 ma 1. data based on characterization results, not tested in production. 2. the physical granularity of the memory is 4 bytes, so cycl ing is performed on 4 bytes even when a write/erase operation addresses a single byte.
docid027322 rev 3 21/36 STWBC electrical characteristics 36 5.3.4 i/o port pin characteristics the i/o port pin parameters are specified under general operating conditions for v dd and t a unless otherwise specified. unused input pins should not be left floating. table 11. voltage dc characteristics symbol description min. (1) typ. max. (1) unit v il input low voltage -0.3 0.3 * v dd v v ih input high voltage (2) 0.7 * v dd v dd v ol1 output low voltage at 3.3 v (3) 0.4 (4) v ol2 output low voltage at 5 v (3) 0.5 v ol3 output low voltage high sink at 3.3 v / 5 v (2) , (5) , (6) 0.6 (4) v oh1 output high voltage at 3.3 v (3) v dd - 0.4 (4) v oh2 output high voltage at 5 v (3) v dd - 0.5 v oh3 output high voltage high sink at 3.3 v / 5 v (2) , (5) , (6) v dd - 0.6 (4) h vs hysteresis input voltage (7) 0.1 * v dd r pu pull-up resistor 30 45 60 k ? 1. data based on characterization result, not tested in production. 2. all signals are not 5 v tolerant (input signals can't be exceeded v ddx (v ddx = v dd , v dda ). 3. parameter applicable to signals: gpio_[0:2], driveout[0:3], pwm_aux. 4. electrical threshold voltage not yet characterized at -40 oc. 5. parameter applicable to signal: swim. 6. parameter applicable to signal: digin [0]. 7. applicable to any digital inputs.
electrical characteristics STWBC 22/36 docid027322 rev 3 table 12. current dc characteristics symbol description min. typ. max. (1) unit i ol1 standard output low level current at 3.3 v and v ol1 (2) 1.5 ma i ol2 standard output low level current at 5 v and v ol 2 (2) 3 i olhs1 high sink output low level current at 3.3 v and v ol3 (3) , (4) 5 i olhs2 high sink output low level current at 5 v and v ol (3) , (4) 7.75 i oh1 standard output high leve l current at 3.3 v and v oh1 (2) 1.5 i oh2 standard output high level current at 5 v and v olh2 (2) 3 i ohhs1 high sink output low level current at 3.3 v and v oh3 (3) , (4) 5 i ohhs2 high sink output low level current at 5 v and v oh3 (3) , (4) 7.75 i lkg input leakage current digital - analog v ss ? v in ? v dd (5) 1 ? a i_ lnj injection current (6) , (7) 4 ma ? i_ lnj total injection current (sum of all i/o and control pins) (6) 20 1. data based on characterization result, not tested in production. 2. parameter applicable to signals: gpio_[0:2], driveout[0:3], pwm_aux. 3. parameter applicable to signal: swim. 4. parameter applicable to signal: digin [0]. 5. applicable to any digital inputs. 6. maximum value must never be exceeded. 7. negative injection current on the adcin [7:0] signals (pr oduct depending) => spare_adc signals have to avoid since impact the adc conversion accuracy.
docid027322 rev 3 23/36 STWBC electrical characteristics 36 5.3.5 typical output level curves this section shows the typical output voltage level curves measured on a single output pin for the two-pad family present in the STWBC device. standard pad this pad is associated to the following si gnals: digin [0:1], swim and gpio_[0:2] when available. figure 8. v oh standard pad at 3.3 v figure 9. v ol standard pad at 3.3 v
electrical characteristics STWBC 24/36 docid027322 rev 3 figure 10. v oh standard pad at 5 v figure 11. v ol standard pad at 5 v
docid027322 rev 3 25/36 STWBC electrical characteristics 36 5.3.6 fast pad this pad is associated to the driveout[0:3], pwm_aux sign als if the external pin is available. figure 12. v oh fast pad at 3.3 v figure 13. v ol fast pad at 3.3 v
electrical characteristics STWBC 26/36 docid027322 rev 3 figure 14. v oh fast pad at 5 v figure 15. v ol fast pad at 5 v
docid027322 rev 3 27/36 STWBC electrical characteristics 36 5.3.7 reset pin characteristics the reset pin parameters are specified under general operating conditions for v dd and t a unless otherwise specified. 5.3.8 i 2 c interface characteristics table 13. nrst pin characteristics symbol parameter conditions min. (1) typ. max. (1) unit v il(nrst) nrst input low level voltage (1) -0.3 0.3 x v dd v v ih(nrst) nrst input high level voltage (1) 0.7 x v dd v dd + 0.3 v ol(nrst) nrst output low level voltage (1) i ol = 2 ma 0.5 r pu(nrst) nrst pull-up resistor (2) 30 40 60 k ? t ifp(nrst) nrst input filtered pulse (3) 75 ns t infp(nrst) nrst not input filtered pulse (3) 500 t op(nrst) nrst output filtered pulse (3) 15 s 1. data based on characterization results, not tested in production. 2. the rpu pull-up equivalent resist or is based on a resistive transistor. 3. data guaranteed by design, not tested in production. table 14. i 2 c interface characteristics symbol parameter standard mode fast mode unit min. (1) max. (1) min. (1) max. (1) t w(scll) scl clock low time 4.7 1.3 s t w(sclh) scl clock high time 4.0 0.6 t su(sda) sda setup time 250 100 ns t h(sda) sda data hold time 0 (2) 0 (2) 900 (2) t r(sda) t r(scl) sda and scl rise time (vdd = 3.3 to 5 v) (3) 1000 300 t f(sda) t f(scl) sda and scl fall time (vdd = 3.3 to 5 v) (3) 300 300 t h(sta) start condition hold time 4.0 0.6 s t su(sta) repeated start condition setup time 4.7 0.6 t su(sto) stop condition setup time 4.0 0.6 s t w(sto:sta) stop to start condition time (bus free) 4.7 1.3 s c b capacitive load for each bus line (4) 50 50 pf 1. data based on standard i 2 c protocol requirement, not tested in production. 2. the maximum hold time of the start condition has only to be met if the interface does not stretch the low time 3. i 2 c multifunction signals require the high sink pad configuration and the interc onnection of 1 k pull-up resistances. 4. 50 pf is the maximum load capacitance value to meet the i 2 c std timing specifications.
electrical characteristics STWBC 28/36 docid027322 rev 3 5.3.9 10-bit sar adc characteristics the 10-bit sar adc oscillator parameters are specified under genera l operating conditions for v dda and t a unless otherwise specified. adc accuracy characteristics at v dd /v dda 3.3 v table 15. adc characteristics symbol parameter conditions min. typ. max. unit n resolution 10 bit r adcin adc input impedance 1 m ? v in1 conversion voltage range for gain x1 01.25 (1) , (2) 1. maximum input analog voltage cannot exceed v dda . 2. exceeding the maximum voltage on the spare_adc si gnals for the related conversion scale must be avoided since the adc conversion accuracy can be impacted. v ref adc main reference voltage (3) 3. adc reference voltage at t a = 25 c. 1.250 v table 16. adc accuracy characteristics at v dd /v dda 3.3 v symbol parameter typ. (1) 1. temperature operating: t a = 25 c. min. (2) 2. data based on characterization results, not tested in production. max. (2) unit |e t | total unadjusted error (3) , (4) , (5) 3. adc accuracy vs. negative injection current. inject ing negative current on any of the analog input pins should be avoided as this reduces the accuracy of the conversion being performed on another analog input. it is recommended a schottky diode (pin to ground) to be added to standard analog pins which may potentially inject the negative current. any positive in jection current within t he limits specified for i inj(pin) and ? inj(pin) in the i/o port pin characteristic secti on does not affect the adc accuracy. the adc accuracy parameters may be also impacted exceeding the adc maximum input voltage v in1 or v in2 . 4. results in manufacturing test mode. 5. data aligned with trimming voltage parameters. 2.8 lsb |e o | offset error (3) , (4) , (5) 0.3 |e g | gain error (3) , (4) , (5) , (6) 6. gain error evaluation with the two point method. 0.4 e o+g offset + gain error (6) , (7) 7. temperature operating range: 0 oc ? t a ? 85 oc. -8.5 9.3 e o+g offset + gain error (6) , (8) 8. temperature operating range: -25 oc ? t a ? 105 oc. -11 11 e o+g offset + gain error (6) , (9) 9. temperature operating range: -40 oc ? ta ? 105 oc. -14.3 11.3 |e d | differential linearity error (1) , (2) , (3) 0.5 |e l | integral linearity error (3) , (4) , (5) 1.4
docid027322 rev 3 29/36 STWBC electrical characteristics 36 adc accuracy characteristics at v dd /v dda 5 v table 17. adc accuracy characteristics at v dd /v dda 5 v symbol parameter typ. (1) 1. temperature operating: ta= 25 c. min. (2) 2. data based on characterization results, not tested in production. max. (2) unit |e t | total unadjusted error (3) (4) , (5) 3. adc accuracy vs. negative injection current. inject ing negative current on any of the analog input pins should be avoided as this reduces the accuracy of the conversion being performed on another analog input. it is recommended a schottky diode (pin to ground) to be to added to standard analog pins which may potentially inject negative current. any positive in jection current within the limits specified for i inj(pin) and ? iinj(pin) in the i/o port pin characteristic section does not affect the adc accuracy. the adc accuracy parameters may be also impacted exceeding the adc maximum input voltage v in1 or v in2 . 4. results in manufacturing test mode. 5. data aligned with trimming voltage parameters. tbd lsb |e o | offset error (3) , (4) , (5) 0.5 |e g | gain error (3) , (4) , (5) , (6) 6. gain error evaluation with two point method. 0.4 e o+g offset + gain error (6) , (7) 7. temperature operating range: 0 oc ? t a ? 85 oc. -8.3 8.9 e o+g offset + gain error (6) , (8) 8. temperature operating range: -25 oc ? t a ? 105 oc. -10.9 10.9 eo+g offset + gain error (6) , (9) 9. temperature operating range: -40 oc ? ta ? 105 oc. 11. -13.8 10.9 |e d | differential linearity error (1) , (2) , (3) 0.8 |e l | integral linearity error (3) , (4) , (5) 2.0
electrical characteristics STWBC 30/36 docid027322 rev 3 adc conversion accuracy figure 16. adc conversion accuracy adc accuracy parameter definitions: ? e t = total unadjusted error: maximum deviation between the actual and the ideal transfer curves. ? e o = offset error: deviation between the firs t actual transition and the first ideal one. ? e og = offset + gain error (1-point gain): devi ation between the last ideal transition and the last actual one. ? e g = gain error (2-point gain): defined so that eog = eo + eg (parameter correlated to the deviation of the c haracteristic slope). ? e d = differential linearity error: maximum de viation between actual steps and the ideal one. ? e l = integral linearity error: maximum deviat ion between any actual transition and the end point correlation line.
docid027322 rev 3 31/36 STWBC electrical characteristics 36 5.4 emc characteristics 5.4.1 electrostatic discharge (esd) electrostatic discharges (3 positive then 3 negative pulses separated by 1 second) are applied to the pins of each sample according to each pin combinati on. the sample size depends on the number of supply pins in the device (3 parts * (n + 1) supply pin). data based on characterization results, not tested in production. 5.4.2 static latch-up two complementary static tests are required on 10 parts to assess the latch-up performance. a supply overvoltage (applied to each power supply pin) and a current injection (applied to the each input, output and configurable i/o pin) are performed on each sample. this test conforms to the eia/jesd 78 ic latch-up standard. table 18. esd absolute maximum ratings symbol ratings conditions maximum value unit v esd(hbm) electrostatic discharge voltage (human body model) t a = 25 c, conforming to jedec/jesd22-a114e 2000 v v esd(cdm) electrostatic discharge voltage (charge device model) t a = 25 c, conforming to ansi/esd stm 5.3.1 esda 500 v esd(mm) electrostatic discharge voltage (machine model) t a = 25 c, conforming to jedec/jesd-a115-a 200 table 19. electrical sensitivity symbol parameter conditions level lu static latch-up class t a = 105 c a
thermal characteristics STWBC 32/36 docid027322 rev 3 6 thermal characteristics the STWBC functionality cannot be guaranteed when the device operating exceeds the maximum chip junction temperature (t jmax ). t jmax , in c, may be calculated using equation: t jmax = t amax + (p dmax x ? j a ) where: t amax is the maximum ambient temperature in c ? j a is the package junction to ambient thermal resistance in c/w p dmax is the sum of p intmax and p i/omax (p dmax = p intmax + pi/o max ) p intmax is the product of i dd and v dd , expressed in watts. this is the maximum chip internal power. p i/omax represents the maximum power di ssipation on output pins where: p i/omax = ? (v ol * i ol ) + ?? [(v dd - v oh ) * i oh ], taking into acco unt the actual v ol /i ol and v oh /i oh of the i/os at the low and high level. table 20. package thermal characteristics symbol parameter value unit ? ja vfqfpn32 - thermal resistance junction to ambient (1) 1. thermal resistance is based on je dec jesd51-2 with 4-layer pcb in a natural convection environment. 26 c/w
docid027322 rev 3 33/36 STWBC package information 36 7 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack specifications, grade definitions a nd product status are available at: www.st.com . ecopack is an st trademark. 7.1 package design overview figure 17. vfqfpn32 package outline
package information STWBC 34/36 docid027322 rev 3 7.2 package mechanical data note: 1. vfqfpn stands for ?thermally enhanced very thin fine pitch quad flat package no lead?. 2. very thin profile: 0.80 < a 1.00 mm. 3. details of the terminal 1 are optional but must be located on the top surface of the package by using either a mold or marked features. 4. package outline exclusive of any mold flashes dimensions and metal burrs. table 21. vfqfpn32 package mechanical data symbol dimensions (mm) min. typ. max. a 0.80 0.90 1.00 a1 0 0.02 0.05 a3 0.20 b 0.18 0.25 0.30 d 4.85 5.00 5.15 d2 3.40 3.45 3.50 e 4.85 5.00 5.15 e2 3.40 3.45 3.50 e 0.50 0.55 l 0.30 0.40 0.50 ddd 0.08
docid027322 rev 3 35/36 STWBC order codes 36 8 order codes 9 revision history table 22. silicon product order code order code package packaging STWBC vfqfpn32 tube STWBCtr tape and reel table 23. document revision history date revision changes 18-dec-2014 1 initial release. 23-feb-2015 2 updated main title on page 1 . updated section : applications on page 1 (added ?certified? to qi a11). added section 3: certified qi a11 solution on page 9 . updated figure 3: STWBC pinout view on page 10 (updated title, replaced by new figure). updated table 1: pinout description on page 11 (replaced by new table). added section 5: electrical characteristics on page 13 and section 6: thermal characteristics on page 32 . minor modifications throughout document. 26-feb-2015 3 updated main title on page 1 . updated section : features on page 1 (minor modifications). updated section 1: description on page 6 (replaced by new description). added section 2: introduction to wireless battery charging systems on page 8 (added title and description from rev. 2, updated title of figure 2 ). removed section ?2 STWBC system architecture? from page 7 ( figure 2 on page 8 moved to section 1: description ). updated section 3: certified qi a11 solution on page 9 (renumbered headings). minor modifications throughout document.
STWBC 36/36 docid027322 rev 3 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics ? all rights reserved

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